EDA News Monday April 7, 2003 From: EDAToolsCafe _____ CareersCafe.com _____ About This Issue Handling Haz Mat A conversation about hazardous materials in Silicon Valley _____ March 31 - April 4, 2003 By Peggy Aycinena Read business product alliance news and analysis of weekly happenings _____ Manufacturing semiconductor products can be a messy business. Among the numerous, potentially dangerous substances used in the process are the acids needed for etching features onto the silicon wafer. Those acids may include hydrofluoric acid, sulfuric acid, some nitric acid, and a bit of hydrochloric acid here and there. This caustic brew swirls about in the etching baths of semiconductor fabs, just itching to escape and make life miserable for anyone who might be living or working nearby. Semiconductor fabs can be found in lots of places around the world - even within the municipalities of Silicon Valley, municipalities like the City of Santa Clara. Dr. David Parker, Hazardous Materials (Haz Mat) Administrator for the City of Santa Clara Fire Department, says there are standard industry practices which have been developed over the years to insure that dangerous substances like wafer etching chemicals don't, in fact, escape - and that the ground water and sewage systems serving fabrication facilities are functioning under strict specifications and environmentally conscientious oversight. With a Ph.D. in chemistry and 20 years' experience with the Fire Department, Parker is well qualified to discuss the regulations under which semiconductor fabs operate in the City of Santa Clara. He says, "To start with, you've got to distinguish between hazardous materials and hazardous waste. Both the State of California and the Federal Government define what constitutes hazardous waste. Basically, hazardous wastes are the same chemicals that constitute hazardous materials, once those chemicals are thrown down the drain. Those may be the chemicals related to dry cleaning, or auto painting, or plating, or printed circuit board manufacturing. In the case of semiconductor manufacturing, the etching acids become the hazardous waste. Any business that uses hazardous materials is responsible for the legal and safe handling of those materials in day-to-day operations, before, during and after the materials are used." Parker says that once a business operating in the city discards hazardous waste, it's then the business of the City of Santa Clara, the Fire Department, and the publicly-owned sewage treatment plant to be sure that the disposal is carried out safely and within prescribed guidelines. To understand how these agencies attend to public safety, Parker briefly describes the manufacturing process. He starts by saying he's not a "semiconductor guy," that his point of view is one of an informed industry observer, not an expert participant. With that disclaimer in place, Parker says, "After designated features are etched onto the wafer, copious amounts of water are used to wash away the etching acids along with the bits of unwanted, doped silicon. The amounts of silicon and doping agents (boron, arsenic, etc.) which are discarded with the effluence are small and may be of concern, but it's the etching acids which are of the greatest concern. The biggest problem with letting untreated acids out into the main sewage flow is that they are corrosive, an acute environmental problem more than a long-term insidious toxic issue. The acids must be neutralized to minimize their effect downstream from the fab." Neutralizing the acids requires sodium hydroxide, Parker says. "When you mix sodium hydroxide with hydrochloric acid, for instance, you get water and sodium chloride - table salt - and that's very disposable." It's conceivable, Parker says, to have problems with increasing the saline content of the waters around a sewage plant release, but there's kind of an ironic threat in the opposite direction as well. He says a few years ago, a city in the vicinity was pouring its clean, treated water into the San Francisco Bay and was found to be releasing water that was too clean. It was actually reducing the saline content of the water at the mouth of the release and thereby creating an unlivable environment for the aquatic life forms that required some minimal level of saline. According to Parker, there are a number of agencies with oversight responsibilities in various jurisdictions across the United States. There are city government departments - Fire Departments, Planning Commissions, Building Departments, and publicly owned Sewage Treatment Works. There are county governmental agencies - Health Departments and Joint Powers Authorities. There are state governments with Health and Environmental Protections Agencies. And there is the Federal Government with OSHA, EPA, etc. Parker says if you want to build a semiconductor manufacturing facility, some or all of these agencies may have a say in how you're building your fab, where you're building your fab, how you handle the dangerous materials at your manufacturing site to ensure the safety of the employees and the neighborhood, and how you dispose of the materials once you've finished using them. He adds, "Our overarching concern here in the City of Santa Clara Fire Department, for instance, is to have companies within the city limits store and use their chemicals in an appropriate manner. They must file a report with us each year - whether it's Fred's Autobody Shop or Bob's Dry Cleaners or a semiconductor fab - listing the chemicals they use at their site and providing an updated map of the facility. We use that information to help us and to help them respond to any emergencies or to any accidental release of chemicals." Parker says the Fire Department approaches its haz mat responsibilities from the perspective of preventing problems. "We go out every year to the businesses and inspect the facilities. We walk through and see if the chemicals are being stored properly. In the process, we inspect everyone from 'mom and pop' operations to companies as large as Intel [headquartered in Santa Clara]. With the smaller businesses, we tend to just start at one end and walk through to the other end. That way we can see any improvements that may have been made since the previous year's inspection, or see how problems have been dealt with that were revealed in previous visits." "When we inspect smaller companies, we're probably talking to the owner, who is often the only employee. At Intel, on the other hand, there are professional environmental safety and health personnel on board. We make appointments to visit those facilities when we can be assured that the appropriate staff members will be there, ready to answer our questions during the inspection." "During a visit, we read the labels on all hazardous material containers - tanks, pipes, etc. The companies are required to have appropriate labels on all containers - all etching baths, all equipment, all pipelines are required to be marked, for instance. Generally within a fab, the required chemicals are stored outside of the building or in specially designed closets or rooms. Only a small amount of the chemicals are allowed into the processing area at a time. They are piped into those areas in specially designed, acid-proof pipes that must be labeled every 20 feet to indicate their contents." The chemicals used for wafer etching may be reused over and over again, Parker says. He adds that the number of times a chemical is reused is driven by economic factors, not by environmental concerns. "The etching chemicals loose some potency after each use and can only be reused so many times. When the chemicals are ready to be discarded, the discharge goes through specially designed pipes into big collection tanks at the site. The acids are then neutralized and sent on through a sanitary sewage system to the sewage treatment plant, where they mix with public sewage - everything from dishwater to the output of flushed toilets." "At the sewage treatment plant - currently in Silicon Valley, there are sewage treatment plants in San Jose, Sunnyvale, and Palo Alto - you'll find Industrial Waste Inspectors, folks who regularly go out to chip manufacturers, printed circuit board manufactures, platers, etc., and check the discharge. They're checking to see that the pH of the discharge is appropriate and that the heavy metal content is within prescribed limits." Parker says there are a number of semiconductor companies with business facilities in the City of Santa Clara including LSI Logic, Advanced Micro Devices, National Semiconductor, NVidia, and Intel, among others. He says, "Some of these companies also have manufacturing facilities in the city. Intel has a development fab in Santa Clara, for instance, along with its business facilities. And, until recently, National Semiconductor, LSI Logic, and Analog Devices also had fabs up and running in the city, but those three companies are in the process of shutting down their manufacturing facilities here. A year from now, none of those three particular companies will be making chips in the city of Santa Clara." Parker makes it clear, "We always say to anyone who comes to us, we will be happy to work with you when you come into the city and set up your business. But you need to file plans with the Building Department and the Fire Department, so we can review how you are going to handle your hazardous materials. We are interested in the setting up, but we are equally interested in the shutting down of facilities. We want to work with you in a constructive way if you leave. Here in the City of Santa Clara, we always approach things from a compliance perspective, but if you don't work within the confines of the law, we definitely have a vigorous enforcement policy. There are a variety of reasons why a company closes a facility. Often it is because the facility is in an aging building and it would be more expensive to upgrade the building and the equipment, than it would be to build a new facility elsewhere." Parker says the City of Santa Clara has regulations to guarantee the safe shutting down of facilities where hazardous materials have been used. "If you leave a facility which uses hazardous materials of any kind, you have to get a Closure Permit from the city. The permit tells us what you're going to do with left over chemicals and how you are going to deal safely with the chemicals, the equipment, and the land under the building to make sure they're all clean after you depart." "It's true that a small number of facilities have chosen to leave in the dead of night - usually small business concerns - but there are consequences for that type of behavior. Of course, it's just like in any population. You have many who want to obey the law, and a few who don't think they have to. Let's say you just lock your doors and walk away. Remember how we defined hazardous waste? Well, if you're not using hazardous materials anymore, they become hazardous waste - and 'knowing abandonment' of hazardous waste is a felony, which we will prosecute to the full extent of the law. It's that simple." Meanwhile, Parker says Silicon Valley is still fostering the entrepreneurial spirit: "Here in the City of Santa Clara, there continue to be new and innovative companies opening up - even in this rather difficult economic climate - and those businesses are expanding commercial and technology opportunities within the city and across the wider Silicon Valley region. We definitely continue to see new businesses emerge, which are pursuing opportunities in positive and environmentally responsible ways." (Editor's Note: David Parker was interviewed with the permission of the City of Santa Clara. Those who know Dave, know he is an accomplished downhill skier and the father of two fine sons. They also know he is my brother-in-law.) Industry News - Tools & IP Accelerated Technology (AT), the Embedded Systems Division of Mentor Graphics Corp., announced a new version of the Nucleus RTOS for developers using the ARM10 family of processors. AT says it is providing a version of Nucleus for the ARM1020E and ARM1022E hard macrocell products, and the synthesizable, configurable ARM1026EJ-S. Aldec, Inc., announced the release of Riviera 2003.03, which the company says offers increased performance, new debugging features, and support for SystemC. Riviera is based on Aldec's VHDL and Verilog mixed-language simulation technology and is used by ASIC and high-density FPGA designers for SoC development. The new product has a more efficient memory allocation to reduce the amount of memory required during compilation and simulation. The new release allows the results of both RTL and C simulation to be viewed and modified in Riviera's Waveform Viewer/Editor for simulation analysis and modification. Comit Systems has introduced the Fiesta CMBT Memory BIST (built-in self-test) software tool. The company says the new tool is "the first memory BIST tool to provide full-speed and fault-accumulative testing of SoCs with repairable embedded memories." The company estimates that the new tool, which is shipping now, can improve yields and help achieve up to a 50% reduction in test and repair costs, while expediting time to market. The tool has full-speed memory test capability for testing both conventional and 1T-SRAM embedded memories at real-time access speeds. The company says those capabilities "ensure accurate identification of SoC devices that might fail in the field." Comit Systems says that MoSys (Monolithic System Technology Inc.) provided "valuable input during the development of the Fiesta CMBT." Mark-Eric Jones, Vice President and General Manager of IP at MoSys, said, "By working closely with Comit and providing our requirements throughout the development stage, we were able to ensure an optimum BIST solution for 1T-SRAM embedded memories. Lower test cost, reducing the test time and simplifying the analysis of test results will immediately benefit our customers." 0-In Design Automation announced the availability of CheckerWare monitor. The company says the CheckerWare Monitor for PCI Express technology is "the first verification IP model that can be used in simulation, formal verification, and hardware acceleration and emulation to validate conformance with the PCI Express (formerly 3GIO) standard." 0-In CheckerWare monitors are part of an assertion-based verification (ABV) interoperability strategy that supports Verilog and Accellera's PSL/Sugar standards. All 0-In monitors provide formal tool support, testbench and simulator independence, and support for all tools in existing verification environments. CheckerWare monitors test that the designs conform to interface standards and are interoperable with other products that support the same standards. MIPS Technologies, Inc. and Cirrus Logic, Inc. announced that Cirrus has taken a license for various MIPS 32-bit processor cores, including the MIPS32 4KEc, 4KEm, 4KEp and M4K cores. Cirrus says that as a MIPS licensee, it will benefit from software applications optimized for the MIPS architecture in development of digital entertainment applications. Tera Systems, Inc. announced that the TeraForm RTL Silicon Virtual Prototype (SVP) has been integrated into the IBM Blue Logic MidRange ASIC design flow. The companies says that IBM and Tera jointly developed and qualified this flow in support of a new engagement model allowing RTL handoff of customer designs. They also say this model will permit a greater focus on functional design by system design customers while taking advantage of IBM's extensive design implementation tool suite and design center expertise. TriCN announced that Internet Machines has successfully sampled its iMpower communications chipset using a variety of licensed interface IP products from TriCN. Internet Machines develops network processor, traffic management, and switch fabric semiconductors. The iMpower chipset is targeted for use in a variety of networking equipment and requires reliable high-frequency I/O interface technology. Industry News - Devices Atmel Corp. announced the availability of the AT89C5131 and AT89C5132, 8-bit Flash microcontrollers, which include an integrated full-speed compatible USB 2.0 controller and advanced on-chip peripherals. The AT89C5131 and AT89C5132 allows manufacturers to integrate a USB full-speed interface, and include 32- and 64-Kbyte on-chip Flash memory respectively, a full-speed USB controller with isochronous and bulk modes allowing easy high speed transfer. Also from Atmel - The company announced that it is sampling a secureAVR RISC Microcontroller with 32Mega-bit Flash. This product is based on the AT90SC3232CS (secureAVR processor, 32Kbytes Flash, 32Kbytes EEPROM) with 32Mega-bit of Flash for secure data storage. Faraday Technology Corp. announced availability of a USB 2.0 transceiver and device controller IP for UMC 0.25-micron and 0.18-micron process technologies. Faraday says that both IP blocks are test-chip proven and have been incorporated in many customers' designs, some of which are moving into productions. These IP blocks are new additions to the existing USB product offerings. IBM and NVIDIA announced the two companies have formed a multi-year strategic alliance under which IBM will manufacture NVIDIA's next-generation GeForce graphics processor units (GPUs). As part of the agreement, NVIDIA will have access to IBM's suite of foundry services and manufacturing technologies, including copper wiring, and a roadmap that leads to 65-nanometer manufacturing in the next several years. Motorola, Inc. announced that it has demonstrated what the company calls "the world's first 4-Mbit memory device based on silicon nanocrystals. The fully functional 4-Mbit test chip represents a major milestone in the search for successors to floating gate-based flash memories, which many believe will not continue to scale to smaller geometries. These advances could lead to memories that are smaller, more reliable and more energy-efficient than floating gate-based flash memories." Silicon nanocrystal memories are part of an advanced class of memory techniques called thin film storage. Motorola says it has developed techniques designed to help simplify the manufacture of these memories. Using traditional deposition equipment, researchers at Motorola's DigitalDNA Laboratories, deposited silicon nanocrystals resembling 50-angstrom diameter spheres between two layers of oxide. The silicon spheres are engineered to hold and prevent lateral movement of charge to other isolated nanocrystals. This is expected to increase reliability and scalability because a single oxide defect does not lead to complete charge loss as in a conventional floating gate nonvolatile memory. Teradyne announced that Semiconductor Manufacturing International Corp. (SMIC) of Shanghai, China has purchased multiple logic and mixed-signal test systems for a range of applications at wafer test. The test systems SMIC purchased include a complete suite of digital and analog instruments to test a range of consumer, communications, and computing devices. The company says that with the addition of Teradyne's systems, SMIC will enhance its testing capacity of digital and mixed signal devices. NVIDIA Corp. and TSMC reaffirmed their long-time relationship, and said that TSMC will remain NVIDIA's primary foundry partner. UMC announced that it is shipping customer products based on its 90-nanometer logic process, making UMC the first dedicated foundry company to announce the delivery of working customer IC's built on the industry's most advanced manufacturing technology. UMC is the first foundry to achieve this significant milestone, signifying the tremendous progress it has made on its most advanced process offering over recent months. UMC expects to move customer wafers to volume production later this year. Also from UMC - The company announced that it has granted Xilinx Inc. a Customer Appreciation Award for achieving key manufacturing milestones in the semiconductor industry - volume production of all advanced FPGA product lines on 300mm wafers using 0.13-micron and 0.15-micron process technology. Similarly, Xilinx, Inc. reported that the company is shipping the "world's first 90-nanometer programmable chips." The company says a successful partnership strategy with IBM and UMC has "put Xilinx at the forefront of the semiconductor industry's race to 90 nanometers. Functional chips have been produced at both IBM and UMC." Coming soon to a theater near you National Semiconductor Corp. has launched the Analog University, a free on-line educational resources devoted to analog semiconductor technologies. Analog University includes beginning, intermediate, and advanced classes in eight different technologies - amplifiers, audio, data conversion, displays, low voltage differential signaling, power management, thermal management, and wireless. The company says the resource is designed to meet the "information needs of novice, mid-career, and experienced design engineers." National also introduced Knowledge Base, an on-line tool that the company says will enable engineers to sift through large amounts of technical resources on the company's website and quickly generates highly targeted results. ( www.analogu.national.com and www.national.com ) SEMICO Research Conference - Semico will host a one-day conference on April 29th to examine the challenges of designing and manufacturing semiconductors at 90 nanometers and below. Titled, "90 Nanometers and Beyond," the session will feature presentations by Semico analysts and industry executives. Design tools, testing, prototyping and manufacturing issues will be discussed, as well as the markets that will benefit from ultra-fine process technology. The Semico session will be held at the Silicon Valley Conference Center in San Jose, CA.( www.semico.com ) Newsmakers AMD and Fujitsu Ltd. announced they have executed a Memorandum of Understanding (MOU) to establish a new Flash memory semiconductor company headquartered in Sunnyvale, CA. A Japan-based headquarters will be located in Tokyo. AMD and Fujitsu says that the new company, FASL LLC, will be "based on the integration of AMD and Fujitsu's Flash memory businesses, including their existing joint manufacturing venture, Fujitsu AMD Semiconductor Ltd. The new company is expected to begin operations in the Q3 2003. Among several items, the MOU provides for AMD to own a 60% interest in the new company and Fujitsu to own a 40% interest. The financial results will be consolidated in AMD's financial statements AMD will appoint the CEO of the company - Bertrand Cambou, currently AMD Senior Vice President for the Memory Group. Fujitsu will appoint the first Chairman of the Board - Masamichi Ogura, currently Fujitsu Corporate Senior Vice President & Group President, Electronic Devices Business Group Cadence Design Systems, Inc. was named one of "America's Most Admired Companies" by Fortune Magazine in its annual survey of executives, directors and industry analysts. Cadence says it was one out of 10 companies in the software category, and the only EDA company honored in the software category. Fortune surveyed 10,000 executives, directors and securities analysts. They rated the companies in their own industries using eight criteria - social responsibility, innovation, long-term investment value, use of corporate assets, employee talent, financial soundness, quality of products/services and quality of management. In addition to high marks in quality of management and quality of products/services, Cadence won a strong rating in the innovation category. CoCreate Software, Inc. announced the appointment of Steve Brown, formerly CoCreate's Director of Sales for the U.S. Western Region, to a new role as Vice President of U.S. Sales Operations. The appointment will be effective immediately. Brown has 13 years' experience in sales and sales management of software and services. He has also worked as an application and system engineer in the automotive industry. Before coming to CoCreate, Brown served at Proficiency, Inc., and held various positions at SDRC in sales, sales management and technical support management. Credence Systems Corp. announced the opening of a direct sales and marketing office in Shanghai, China. The facility will provide staff application and technical support engineers, who will offer assistance, training, and demonstrations of Credence's products and technologies to customers and partners in the area. The company says the Shanghai office "represents an important milestone for Credence and is a key component of the company's strategy to aggressively pursue rapidly growing markets and regions. China is one of the world's fastest growing semiconductor markets and is predicted to grow 25% annually through 2005, according to the Ministry of Information Industry (MII). China's production of consumer ICs for DVD players, cellular handsets and game consoles remains strong and is predicted to drive future growth for the region." Get2Chip, Inc. announced that it has opened a technical support office in Bangalore, India to field its new Technology Circle (T-Circle) program. Taher Abbasi, Director of Get2Chip's Technical Support Group, says, "By the end of March 2003, we will have 12 support personnel in the Bangalore office, with plans to expand to 150 by 2005 to support a projected 5000 users among our customer base. The T-Circle program targets design teams working on very complex, high-speed designs larger than 10 million gates." The company adds, "The T-Circle program is an initiative that will leverage the high quality engineering talent pool available in India and the time difference between the U.S. and Asia. The T-Circle team will provide technical support for customers in Asia and back-office support for application resource teams in the US, as well as programs to facilitate exchange of information among the Get2Chip user community." Magma Design Automation Inc. announced the appointment of Timothy J. Ng to its Board of Directors, effective immediately. Ng fills the board seat vacated by Andy Bechtolsheim, who resigned in February. Ng has recently joined Soundview Technology Group as a Managing Director and head of M&A, and served as a Managing Director in the Global Technology Group at Credit Suisse First Boston until December 2002. Bechtolsheim had served on Magma's board since 1997. In the category of ... EDAC 2002 Numbers Released The EDA Consortium's Market Statistics Service (MSS) reported that the EDA industry revenues for Q4 2002 were $907 million, 13% less than Q4 2001. The report says that a 20% increase in consumption in Rest-of-World was not enough to overcome revenue declines in other regions. Total EDA industry revenue for 2002 for products, maintenance and services was $3.7 billion, a 7% decrease from 2001. Product and maintenance revenue - including CAE, IC physical design & verification, PCB, and MCM layout tools and semiconductor IP - totaled $3.4 billion, 3% less than 2001. 2002 is the first year that reported revenue has not increased year-over-year since EDAC began its Market Statistics Service in 1994. Walden Rhines, EDAC Chairman, and Chairman and CEO of Mentor Graphics Corp., said, "EDA revenue for 2002 suffered a modest decline. However, given the global downturn in the semiconductor industry, a relatively small decline indicates that EDA remains essential to getting new products to market, and is generally less susceptible to overall industry volatility." Rhines also said, "When the statistics are examined closely, products and maintenance revenue were only down 3% in 2002, and those categories constitute the vast majority of the business. It was consulting that was really down. This is understandable when you realize that companies would rather let their consultants go, than lay off their own people." He said that companies need to maintain a skilled set of employees, so that those capabilities are there when the company needs them. "If you've got all of your technical expertise in your consultants, you've got a problem." Meanwhile, Rhines says, "Looking back, 2000 was a great year. We also grew in 2001. And a 3% decline in products and maintenance revenue in 2002 isn't too bad. We're still at a high level of revenue when you get down to the software and maintenance, which is still very near record levels - despite all of the cut backs and constraints." Rhines says the "commoditization" of the manufacturing process means that companies today are turning to efficient design practices as the mechanism for differentiating their products. "As semiconductor and system companies alike have moved to a standardized way of manufacturing chips and hardware, the area that is left for [distinguishing] one company from another is their design strategy. That means there are more and more companies buying design software. That's definitely good news for the EDA industry." Letters to the Editor - mostly uncensored and unabridged March 3rd - Pending News of War and Peace Anushree Tewari at Interra Systems - "What you've said is absolutely correct. These are troubled times, but life does and has to go on. I witnessed Punjab (a state in Northern India) during the height of terrorism over there, in the 1980s. I was posted there for a few months during that period. It was there that I realized this vital truth - Everyone knew that anything could happen anywhere, anytime, but people went about their lives in a very normal way. I also realized that being scared doesn't help. How long can one go through life in this state? One needs to live through each day." March 10th - Division of Labor (design versus verification) Janick Bergeron, Moderator of the Verification Guild Mailing List - "Read your newsletter. Good text. I'll reference it in the next issue of the Guild. Can you change my affiliation to Qualis, Inc.? Thanks." (Editor's Note: The change was made in the on-line version of EDA Weekly.) Anon - "I have 10 years experience in test and verification, mostly as a consultant. Before that, I had 10 years in design, using real-time embedded systems. I am currently studying for my Real Estate license. I strongly advise young engineers to not accept a job with the title 'Verification Engineer,' because you will be the first one to get laid off, and you will have a great deal of trouble finding another job. I hope that the companies who are currently refusing to spend any money on verification go bankrupt, so that they may serve as an example." Graham Bell, Director of Marketing for Nassda - "As was clear in your recent column, verification is currently facing the pressure points of tighter design budgets and increasing complexity. Nanometer effects in the digital realm mean that timing verification can no longer be limited to static gate-level analysis, which lacks the detail to resolve these dynamic effects that lie at the transistor level. Yet traditional SPICE tools lack the performance and capacity to handle large post-layout designs with thousands of critical nets, and clock networks that can exceed several hundred thousand transistors." "Fortunately, automation of these previously manual tasks can reduce design time, and allow both verification experts and designers an improved ability to achieve accurate verification. Specifically, Nassda has seen a move by high-performance digital designers toward the automation of transistor-level simulation of critical paths and clock trees. Everyone knows that gate-level static timing analysis (STA) is not accurate for nanometer design - it's a matter of finding out 'how much.' One of Nassda's customers found that a clock net simulation using STA alone was off by 35%, due to a combination of poor cell characterization and a simplistic model semantic. If the customer hadn't had the means for automated transistor-level analysis across the entire clock network, this defect would have been discovered when the prototype ICs were returned, and its repair would have incurred the time and cost of a re-spin." March 17th - DAC 2003 Keynote Addresses Simon Davidmann - "I note you refer to Sir Robin Saxby of ARM at one point as 'Sir Saxby.' In fact, this is technically wrong. The correct English is 'Sir Robin Saxby' or 'Sir Robin' - unlike Mr. or Dr. or Prof. , which could all be (title)(last name). For knights (Sir Robin is now a knight) it is (title)(first name) or (title)(first name)(last name), but never (title)(last name). Meanwhile, Sir Robin's wife is addressed as 'Lady Saxby' - (title)(last name). It's all definitely strange and confusing, but that is the old English way. For a full description, I refer you to this link for Baronets ( www.baronetage.org/Addressing.htm ) Enjoy!" March 17th - Personal Notes from PCB West 2003 Jonah McLeod, Marketing Director at Denali Systems - "I enjoyed the update on Pete [Waddell] and company, and the story about the Synopsys science fair for young aspiring nerds." (Editor's Note - Jonah assures us that he uses the term "nerd" with great affection.) March 17th - PCB Technology Leadership Awards and University Scholarship Phil Lindberg, Design Automation, Technical Services Department, The Johns Hopkins University Applied Physics Laboratory - "Just a quick thanks for mentioning Mentor's PCB Technology Leadership Awards. The PCB side of the design automation world often seems to be shoved aside for the sexier FPGA/ASIC/IC world. Of course, we also have a personal connection this year. The winner of the University Scholarship, Jonathan Andrews, interned here at APL last summer, so we're pleased to see him do well." March 24th - EDA in Taiwan & China Mr. 'Hwguo' - "[Expletive deleted]! Taiwan is a province of China." March 31st - ASICs versus FPGAs Judy Erkanat, PR at Cadence - "One problem, Peggy. Ted didn't speak - Aurangzeb Khan head of the Cadence Design Foundry filled in for him." (Editor's Note: It was obvious to anyone who attended ISQED, that I was not there for the Tuesday morning keynote addresses. Otherwise, I would have known it was not Ted Vucurevich who spoke on behalf of Cadence. Although Vucurevich was listed in the advance program, it was the very capable Aurangzeb Khan from Cadence who gave the second keynote address of the morning. My apologies to Khan. The March 31st issue of EDA Weekly is now correct and available on-line.) --Peggy Aycinena is a Contributing Editor and can be reached at peggy@ibsystems.com . You are subscribed as: [dolinsky@gsu.by]. Cafe News is a service for EDA professionals. EDAToolsCafe respects your online time and Internet privacy. If you would prefer not to receive this type of email or if you consider this message as unsolicited commercial e-mail, please click here . PLEASE NOTE: You can change the frequency of this newsletter by clicking here . If you have questions about EDAToolsCafe services, please send email to edaadmin@ibsystems.com . Copyright c 2002. Internet Business Systems, Inc. All rights reserved.